From c920893089f1ff2eba20439bdb84552c41a4bf23 Mon Sep 17 00:00:00 2001 From: Ben Hutchings Date: Wed, 31 May 2017 20:59:05 +0100 Subject: [PATCH] Revert "MIPS: Loongson-3: Select MIPS_L1_CACHE_SHIFT_6" This reverts commit 07d8aabff4903065bb472df9b040b8688fdc75a2 which was commit 17c99d9421695a0e0de18bf1e7091d859e20ec1d upstream. This changed L1_CACHE_SHIFT which is used for structure alignment in many places, thus would break ABI. Gbp-Pq: Topic debian Gbp-Pq: Name revert-mips-loongson-3-select-mips_l1_cache_shift_6.patch --- arch/mips/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 5e844f68e84..5a4f2eb9d0d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1368,7 +1368,6 @@ config CPU_LOONGSON3 select WEAK_ORDERING select WEAK_REORDERING_BEYOND_LLSC select MIPS_PGD_C0_CONTEXT - select MIPS_L1_CACHE_SHIFT_6 select GPIOLIB help The Loongson 3 processor implements the MIPS64R2 instruction -- 2.30.2